The technology of making interconnections for providing vias, lines and other recesses in semiconductor chip structures, flat panel displays, and package applications has been developed for many years. For instance, in developing interconnection technology for very-largescale-integrated (VLSI) structures, aluminum has been utilized as the primary metal source for contacts and interconnects in semiconductor regions or devices located on a single substrate. Aluminum has been the material of choice because of its low cost, good ohmic contact and high conductivity. However, pure aluminum thin-film conductors have undesirable properties such as a low melting point which limits its use to low temperature processing, possible Si diffusion into Al during annealing which leads to contact and junction failure, and poor electromigration resistance. The electro migration phenomenon occurs when the superposition of an electronic field onto random thermal diffusion in a metallic solid causes a net drift of ions. Consequently, a number of aluminum alloys have been developed which provided advantages over pure aluminum. For instance, U.S. Pat. No. 4,566,177 discloses a conductive layer of an alloy of aluminum containing up to 3% by weight of silicon, copper, nickel, chromium and manganese to improve electromigration resistance. U.S. Pat. No. 3,631,304 discloses aluminum alloys with aluminum oxide which were also used to improve electromigration resistance.
More recently VLSI and ULSI technology has placed more stringent demands on the wiring requirements due to the extremely high circuit densities and faster operating speeds required of such devices. This leads to higher current densities in increasingly smaller conductor lines. As a result, higher conductance wiring is desired which requires either larger cross-section wires for aluminum alloy conductors or a different wiring material that has a higher conductance. The obvious choice in the industry is to develop the latter using copper based on its desirable high conductivity.
In the formation of VLSI and ULSI interconnection structures such as vias and lines, copper is deposited into a line, via or other recesses to interconnect semiconductor regions or devices located on the same substrate. Copper is known to have problems at semiconductor device junctions due to its fast reaction rate with Si. Any diffusion of copper ions into the silicon substrate can cause device failure. In addition, pure copper does not adhere well to oxygen containing dielectrics such as silicon dioxide and polyimide.
It is therefore an object of the present invention to provide a diffusion barrier layer between a copper interconnect and other semiconductor materials that does not have the drawbacks or shortcomings of the conventional diffusion barriers.
It is another object of the present invention to provide a diffusion barrier layer between a copper interconnect and a silicon substrate in a semiconductor structure.
It is a further object of the present invention to provide a diffusion barrier between a copper interconnect and a dielectric material layer in which the interconnect is formed.
It is another further object of the present invention to provide a diffusion barrier layer for a copper interconnect in a semiconductor structure wherein the barrier layer is a quaternary composite film of Co--W--P--Au.
It is still another object of the present invention to provide a diffusion barrier layer for a copper interconnect in a semiconductor structure wherein the barrier layer consists of a Au film coated on a Co--W--P alloy film.
It is yet another object of the present invention to provide a diffusion barrier layer for a copper interconnect in a semiconductor structure which is formed by two sequential electroless plating processes.
It is still another further object of the present invention to provide a method for forming a quaternary Co--W--P--Au composite film by first electroless plating a Co--W--P film on the surface of a copper conductive region in a plating bath containing cobalt ions, tungstate ions, citrate ions and a reducing agent, and then immersing the substrate in a Au electroless plating solution for depositing a Au layer on top.
It is yet another further object of the present invention to provide an electronic structure which includes a Co--W--P--Au composite film coating in a via opening that is filled with copper for forming a copper interconnect.